F.A. (Farhad) Merchant, Dr

Faculteit Science and Engineering

Telefoon:

E-mail:

f.a.merchant rug.nl

Research Portal

Research interests

Hardware Security
Neuromorphic Computing
Algorithm-Architecture Co-design
Reconfigurable Computing
Computer Arithmetic

Publicaties

A flexible and fast digital twin for RRAM systems applied for training resilient neural networks

Fritscher, M., Singh, S., Rizzi, T., Baroni, A., Reiser, D., Mallah, M., Hartmann, D., Bende, A., Kempen, T., Uhlmann, M., Kahmen, G., Fey, D., Rana, V., Menzel, S., Reichenbach, M., Krstic, M., Merchant, F. & Wenger, C., dec.-2024, In: Scientific Reports. 14, 1, 13 blz., 23695.

Onderzoeksoutput › › peer review

Error Detection and Correction Codes for Safe In-Memory Computations

Parrini, L., Soliman, T., Hettwer, B., Borrmann, J. M., Singh, S., Bende, A., Rana, V., Merchant, F. & Wehn, N., 26-jun.-2024, 2024 IEEE European Test Symposium (ETS). IEEE, 4 blz.

Onderzoeksoutput › › peer review

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

Bende, A., Singh, S., Jha, C. K., Kempen, T., Cüppers, F., Bengel, C., Zambanini, A., Nielinger, D., Patkar, S., Drechsler, R., Waser, R., Merchant, F. & Rana, V., 10-jan.-2024, 2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID). IEEE, blz. 565-570 6 blz. 10483456

Onderzoeksoutput › › peer review

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG

Rajendran, G., Zahoor, F., Thakker, S. S., Singh, S., Merchant, F., Rana, V. & Chattopadhyay, A., 10-jan.-2024, 2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID). IEEE, blz. 560-564 5 blz. 10483480

Onderzoeksoutput › › peer review

Alle (64) publicaties

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F.A. (Farhad) Merchant, Dr

Research interests

Publicaties

A flexible and fast digital twin for RRAM systems applied for training resilient neural networks

Error Detection and Correction Codes for Safe In-Memory Computations

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG

In-Memory Mirroring: Cloning Without Reading

MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory

PROMISE: A Programmable Hardware Monitor for Secure Execution in Zero Trust Networks

QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL

Resistive Memory for Computing and Security: Algorithms, Architectures, and Platforms

veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing